[begemot]

Нашёл тут статейку Енгельгарта по алгоритмам расчёта, использующихся в LTSPICE

[Alexey77]

Перевёл бы кто.

[Black_Jack]

Недавно столкнулся с проблемой при симуляции. "initial dc operating point issues" вообщем...

Помогло чтение "LTspice Convergence", написаное analog spiceman
Возможно кому-то тоже поможет...

Ссылка: https://groups.io/g/LTspice/message/118250
Копия поста на всякий случай.

LTspice Convergence

Convergence problems generally may be divided into two categories, initial dc operating point issues and transient analysis issues (although addressing operating point issues often will also help mitigate transient convergence problems). My bottom line advice to avoiding these issues is to make all device functions continuous in value and slope and to replace all stiff voltage sources (except zero volt current sensors) with Norton equivalent current sources in parallel typically with one ohm and a small capacitance (typically 1nF). Adjust the Norton sources impedances and time constants as required.

*DC Operating Point Convergence*

When first starting a simulation LTspice attempts to find the circuit's dc operating point, unless "Skip initial operating point solution" (i.e., UIC - Use Initial Conditions) is specified as part of the Simulation Command. LTspice will sequence through up to four algorithms as required in an attempt to find the circuit's dc operating point.

1) Direct Newton Iteration . (skip method with .options NoOpIter)
2) Adaptive Gmin Stepping. . (skip method with .options GminSteps=0)
3) Adaptive Source Stepping. (skip method with .options SrcSteps=0)
4) Pseudo Transient Analysis (skip method with .options pTranTau=0)

For the first three algorithms capacitances are open circuited and inductances are short circuited. However, if element parasitics are specified, capacitor parallel resistance and inductor series resistance will remain. For the final method (Pseudo Transient) all reactances remain and are used by the algorithm.

As good as it is, LTspice is not magic and the old maxim "garbage in - garbage out" still applies. Many, if not most, third party subcircuit models are poorly written. In order to get good dc convergence, a good model should have all its I/V relationships be continuous with continuous derivatives. If all elements within the simulation circuit are continuous in function and slope then LTspice should find the dc operating point using the simplest and quickest first method (Direct Newton Iteration).

The direct Newton method works well for linear circuits and simple circuits with monotonic nonlinearities. If that fails LTspice goes through the process of GMIN stepping (loosely speaking, this adds and steps conductances across PN junctions and/or from every node to ground). If that fails LTspice then tries source stepping.

The source stepping algorithm makes uses the foreknowledge that a realistic simulation always will have a known starting solution when all its sources are set to zero (i.e. that all node voltages and branch currents are zero as well). It also takes advantage of the fact that most all nonlinear elements (e.g. diodes, MOSFETs, etc.) exhibit linear behavior locally around zero (all junctions are off and other nonlinearities are, by definition, operating with small signals). By starting from a known linear solution (i.e., zero) the solver can bootstrap itself up to the normal operating point by gradually ramping up all the sources. In theory each successful step along the way allows linearly extrapolating an almost perfect set of initial conditions for solving the succeeding nearby step.

Problems may arise when starting at zero doesn't yield a zero output. For example, a behavioral error amp with a numeric reference voltage in a difference equation (i.e. "5-V(fb)") will go to 5V when all sources are at zero (LTspice actually has extended source stepping to b-sources to address this). Difficulties can also occur when ramping up through sharp corners or discontinuities in a nonlinear device's characteristic (e.g. digital gates and positive hysteresis devices).

If that fails LTspice then tries a pseudo transient analysis. This is similar to specifying "use initial conditions" with all sources fixed at their initial value and running until a stable dc solution is found (this too may fail with discontinuous devices).

A well crafted control IC model should have a clock that is disabled at startup (along with the IC outputs) so that no internal switching occurs while the power sources first ramp up (the sources should be specified to start from zero or else Use Initial Conditions should be specified in the simulation command).

Also, bear in mind that certain simulated linear circuits may have several numerically valid dc solutions, only one of which usually corresponds to the real circuit's natural solution. If an ac analysis is run and produces wildly unexpected results, it may be due to an improper dc solution. Just because you don't get a dc convergence error message, don't assume all must be well - run a .op and check some of the numbers.

If you still are having dc solution problems, first examine your simulation circuit for behavioral sources or other devices that may go highly nonlinear as the sources are stepped up from zero. Splitting a very nonlinear element into several pieces across several nodes can sometimes dilute the problematic behavior to the point where the solver no longer gets hung up on one very bad element. In such cases, adding more nodes can actually make the simulation run much faster.

Unlike many versions of SPICE, LTspice's native semiconductor devices are all crafted to be continuous in both value and slope, but it is up to the user to ensure the same for behavioral devices such as diodes (see Epsilon), switches (see level 2) and b-source functions.

*Transient Analysis Convergence*

During a transient analysis LTspice reduces the time step to combat convergence problems (bring the next step within the error tolerance). Whenever the simulator reduces the time step, it is because of nonlinear circuit behavior. The implicit assumption is that, as the time step is reduced, the points on the nonlinear function will be close enough to appear linear within the error tolerance and/or the various circuit and/or convergence capacitances will come to dominate the nonlinear bits (which don't depend on time). At very small time steps, only the capacitances will matter and, since capacitances are linear, the circuit will converge and the simulator will be able to get past the nonlinear behavior. Of course this can't work if the models have discontinuities in function or slope and if they omit the "parasitic" capacitances (and the soft impedances they need to work against). Also digital a-devices should normally be specified with realistic delay (e.g., td=10n) and with the tripdt parameter equal to or less than the delay (this disconnects the output change time point from the input change time point).

In order to get good transient convergence, a good model should, as much as possible, contain elements with only voltage inputs and only current outputs. Norton equivalents should be used to produce voltage sources (i.e., specify nonzero values for the optional series resistance and parallel capacitance). To be safe, only stiff voltage sources (normally zero volt sources with zero series resistance) should used for current sensing. It can't be stressed enough that stiff voltage sources (especially nonlinear behavioral types) are problematic because, unlike current sources, resistors and inductors, they will not yield to capacitances at small time steps during convergence difficulties in a transient analysis. Since capacitors are linear devices, the branch behavior becomes linear and the solver can get through the highly nonlinear behavior zones by taking them in small steps.

It is best to make a real circuit capacitance (perhaps a circuit parasitic) perform this duty, but, since the solver will go down to picoseconds, it is almost always possible to choose a capacitor that has absolutely no effect within the normal bandwidth of the circuit, yet still functions very well as a transient convergence aid. Also, to follow these rules means that PN junctions (and other nonlinear element nodes) should never be without some series resistance and some parallel capacitance (many vendor models violate this rule).