A couple of test bench schematics were created in order to evaluate TL431 model performance and make a comparison between suggested model and existing ones. Most of test benches correspond to ones described in the datasheet to take chip measurement data and can be used to tweak model parameters to datasheet numbers. TL431 datasheet was used as a reference.
First Test Bench “TL431_AC_TestBench.asc” is used to evaluate frequency response of all models.
As you can see from result plots, both “Eugene” and “New TI” models shows close match between test results and datasheet. “Eugene’s” plot seems to be slightly closer to the datasheet numbers. “Helmut” plot is lacking 6 dB gain in low frequency range, while keeping functionally correct slope. And as expected, “OLD” model does not show AC performance – it has flat frequency response.
Next Test Bench “TL431_Z_TestBench.asc” is used to evaluate TL431 output impedance.
You can see that “Eugene’s” plot shows very good match in low and middle frequency range and reasonably good match at high frequency. “Helmut” plot shows 2.5 times higher impedance at low frequency and reasonably good match at middle and high frequency. This is probably related to missing 6 dB of gain at low frequency in “Helmut” model. Both “TI New” and “OLD” models show unrealistic impedance plots.
The last Test Bench “TL431_Noise_TestBench.asc” is used to evaluate TL431 noise performance. There is no exact description in the datasheet, how this measurement was taken. I’m expecting that my testbench corresponds to test methodology used to evaluate real chip performance.
Both “Eugene” and “Helmut” models showed good match in mid and high frequency range, while “Eugene” model has better matching in low frequency flicker noise area.
Two other models, “TI New” and “OLD”, can’t simulate noise performance of TL431.
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